Intel reveals chip advances, new partnerships & foundry progress

Intel has released details of advancements in its process technology and packaging roadmap, along with updates on ecosystem partnerships and manufacturing progress at the recent Intel Foundry Direct Connect event.

Chief Executive Officer Lip-Bu Tan addressed customers and partners, highlighting the company's foundry strategy and commitment to enabling customer innovation. Tan's keynote was followed by presentations from Naga Chandrasekaran, Chief Technology and Operations Officer, and Kevin O'Buckley, General Manager of Foundry Services, who provided updates on Intel's manufacturing and supply chain operations.

During the event, Tan was joined by representatives from ecosystem partners such as Synopsys, Cadence, Siemens EDA and PDF Solutions, who discussed the importance of collaboration in supporting foundry customers. O'Buckley also held discussions with executives from MediaTek, Microsoft and Qualcomm.

Tan commented: "Intel is committed to building a world-class foundry that serves the growing need for leading-edge process technology, advanced packaging and manufacturing. Our No. 1 job is to listen to our customers and earn their trust by creating solutions to enable their success. The work we are doing to drive an engineering-first culture across Intel while strengthening our partnerships throughout the foundry ecosystem will help us to advance our strategy, improve our execution and win in the market long term."

On process technology, Intel Foundry announced engagement with lead customers on the forthcoming Intel 14A process node, which follows Intel 18A. The early version of the Intel 14A Process Design Kit has been distributed, and several customers intend to create test chips using this node. Intel 14A will introduce PowerDirect direct contact power delivery, progressing from PowerVia technology in Intel 18A.

Intel 18A itself has reached risk production with the expectation of entering volume manufacturing later in the year. Key partners within the foundry's electronic design automation ecosystem have made available the enablement, reference flows and intellectual property components required for production designs using Intel 18A.

Intel introduced Intel 18A-P, a new variant targeting broader foundry use by enhancing performance. Early wafers relying on Intel 18A-P are reportedly being processed now, and this variant maintains design rule compatibility with Intel 18A. Partner intellectual property and design tool offerings are actively being updated to support Intel 18A-P. Intel also highlighted Intel 18A-PT, which advances performance and power efficiency, and can be integrated using Foveros Direct 3D hybrid bonding with an interconnect pitch below 5 micrometres.

The foundry provided further detail on customer engagement with its 16 nanometre production tape-out, with development ongoing for a 12nm node and related products created alongside foundry partner UMC.

On the packaging front, Intel Foundry is enabling system-level integration by combining Intel 14A on Intel 18A-PT, with connections achieved through Foveros Direct (3D stacking) and embedded multi-die interconnect bridging. The company introduced EMIB-T technology aimed at high bandwidth memory needs, and expanded the Foveros architecture with two new options: Foveros-R and Foveros-B, to provide additional flexibility and efficiency. Intel's collaboration with Amkor Technology is intended to increase the range of advanced packaging choices available to customers.

In manufacturing, Intel announced that its Fab 52 in Arizona has successfully processed its first lot of wafers, considered a milestone for domestic Intel 18A wafer manufacturing. Oregon facilities will lead volume production as the Arizona fab increases output. Intel outlined that research, development and wafer production for Intel 18A and Intel 14A will remain within the United States.

The foundry detailed updates to its ecosystem strategy, noting the expansion of the Intel Foundry Accelerator Alliance to include the new Intel Foundry Chiplet Alliance and Value Chain Alliance. According to Intel, the Chiplet Alliance will "initially focus on defining and driving infrastructure on advanced technology for government applications and key commercial markets. The Intel Foundry Chiplet Alliance will provide an assured and scalable path for customers looking to deploy designs that leverage interoperable and secure chiplet solutions for targeted applications and markets."

The Accelerator Alliance program also encompasses the IP Alliance, EDA Alliance, Design Services Alliance, Cloud Alliance and USMAG Alliance, intended to provide a comprehensive suite of intellectual property, design automation and design service solutions through ecosystem partnerships.

Intel's announcements were made alongside guidance regarding forward-looking statements. The company outlined risks related to industry competition, research and development investment, technology commercialisation, market demand, global supply chain challenges, and macroeconomic factors. The risk statement further referenced supply chain instability, potential product issues, security considerations and shifts in global trade policy as factors that could influence outcomes compared with those anticipated in strategic planning.